The present disclosure relates to a semiconductor device in which solder bumps are formed, a method of manufacturing the same, and a method of manufacturing a wiring board.
A chip-on-chip technique for laminating and mounting plural semiconductor chips within a single package, and a chip-on-wafer technique for mounting a semiconductor chip on a semiconductor wafer have been proposed with recent high integration promotion of semiconductor devices. FIG. 9 shows a schematic structure of a cross section of a general solder bump formed in an existing semiconductor device.
As shown in FIG. 9, an existing semiconductor device 205 is composed of a barrier metal layer 201 and a solder layer 202. In this case, the barrier metal layer 201 is made of a high-melting point metallic material and is formed on an electrode pad portion (not shown) of a semiconductor substrate 203. Also, the solder layer 202 is made of a low-melting point material. Ni, Cu or Au, for example, is used as the high-melting point material composing the barrier metal layer 201. Also, the solder layer 202 is formed on an upper portion of the barrier layer 201. Also, Su, In, Bi or the like is used as the low-melting point metallic material composing the solder layer 202. In addition, in the existing solder bump 200, as shown in FIG. 9, the solder layer 202 is generally formed in such a way that an outer diameter thereof becomes approximately equal to or larger than that of the barrier metal layer 201. This technique, for example, is disclosed in Japanese Patent Laid-Open No. Hei 9-97795.
FIGS. 10A and 10B respectively show processes for manufacturing an existing semiconductor device in which two semiconductor devices 205 each having solder bumps 200 formed thereon are joined to each other. In the description which will be given with reference to FIGS. 10A and 10B, the two semiconductor devices 205 which are to be joined to each other are supposed to be semiconductor devices 205a and 206b, respectively.
Firstly, as shown in FIG. 10A, one semiconductor device 205a is mounted onto the other semiconductor device 205b by using a flip chip bonder in such a way that a surface of one semiconductor device 205a having solder bumps 200 formed thereon, and a surface of the other semiconductor device 205b having the solder bumps 200 formed thereon are made to face each other.
After that, as shown in FIG. 10B, the solder bumps 200 facing each other are made to contact each other under a condition in which a temperature is set equal to or higher than a melting point of the solder layer 202, thereby carrying out the connection between the solder bumps 200. At this time, one semiconductor device 205a is made to be close to the other semiconductor device 205b side while a gap defined between the semiconductor devices 205a and 205b is controlled by the flip chip bonder.